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Radio Receiver
This compact 4.3" x 4.4" software radio is configured to implement a dual-mode Satellite/Terrestrial Receiver from the Analog/Digital converters to the stereo audio output.

More specifically, this design embodies the following functions:
- baseband processing for three channel receiver
- DSP audio decoder
- audio interface
- automotive power conditioning
- user interface over serial link
In addition to the FPGA and DSP, the design emphasizes glue-less interface to a limited number of commercially available parts:
two 10-bit A/D converters
Lucent 16210 DSP
low-cost crystal (+/- 100ppm), no TCXO required
one external SRAM 100ns 512K x 8
one external SDRAM 8 MB.
The design is consistent with a single frequency down-conversion.
The board's purpose is to validate the receiver VHDL code before ASIC manufacturing.
The current code size is 1.7 Million gates.